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A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems Conference paper
Mao F., Lu Y., Seng-Pan U., Martins R.P.. A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems[C], 2018, 1-4.
Authors:  Mao F.;  Lu Y.;  Seng-Pan U.;  Martins R.P.
Favorite | TC[WOS]:1 TC[Scopus]:3 | Submit date：2019/02/11
Delay Compensation  Feedback Loop  Implantable Medical Devices  Real Time  Voltage Doubler  Wireless Power Transfer  
Linearity analysis on a series-split capacitor array for high-speed SAR ADCs Journal article
Zhu,Yan, Chio,U. Fat, Wei,He Gong, Sin,Sai Weng, Seng-Pan,U., Martins,R. P.. Linearity analysis on a series-split capacitor array for high-speed SAR ADCs[J]. VLSI Design, 2010, 2010.
Authors:  Zhu,Yan;  Chio,U. Fat;  Wei,He Gong;  Sin,Sai Weng;  Seng-Pan,U.; et al.
Favorite | TC[WOS]:14 TC[Scopus]:6  IF:0.138/0.000 | Submit date：2021/03/09
Linearity Analysis On A Series-Split Capacitor Array for High-Speed SAR ADCs Journal article
Zhu, Y., Chio, U. F., Wei, H. G., Sin, S. W., Martins, R. P.. Linearity Analysis On A Series-Split Capacitor Array for High-Speed SAR ADCs[J]. VLSI Design, 2009, 1-10.
Authors:  Zhu, Y.;  Chio, U. F.;  Wei, H. G.;  Sin, S. W.;  Martins, R. P.
Favorite | TC[WOS]:14 TC[Scopus]:6 | Submit date：2022/01/24
Split Dac  Sar Adc  Linearity Analysis  
Multirate Switched-Capacitor Filters Book chapter
出自: Design of analog-digital VLSI circuits for telecommunications and signal processing, Upper Saddle River, NJ, USA:Prentice-Hall, Inc., 1994, 页码:251 - 288
Authors:  José E. Franca;  Rui P. Martins
Favorite |  | Submit date：2019/03/01