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A 0.15-V, 44.73% PCE charge pump with CMOS differential ring-VCO for energy harvesting systems Journal article
Pakkirisami Churchill, Kishore Kumar, Ramiah, Harikrishnan, Chong, Gabriel, Ahmad, Mohd Yazed, Yin, Jun, Mak, Pui In, Martins, Rui P.. A 0.15-V, 44.73% PCE charge pump with CMOS differential ring-VCO for energy harvesting systems[J]. Analog Integrated Circuits and Signal Processing, 2022, 111(1), 35-43.
Authors:  Pakkirisami Churchill, Kishore Kumar;  Ramiah, Harikrishnan;  Chong, Gabriel;  Ahmad, Mohd Yazed;  Yin, Jun; et al.
Favorite | TC[WOS]:6 TC[Scopus]:8  IF:1.2/1.0 | Submit date：2022/05/04
Charge Pump  Dc-to-dc Conversion  Dynamic Voltage Frequency Scaling (Dvfs)  Energy Harvesting  Ring-voltage ContRolled Oscillator (Ro)  
Ambient RF energy harvesting system: a review on integrated circuit design Journal article
Chong, Gabriel, Ramiah, Harikrishnan, Yin, Jun, Rajendran, Jagadheswaran, Wong, Wei Ru, Mak, Pui-In, Martins, Rui P.. Ambient RF energy harvesting system: a review on integrated circuit design[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2018, 97(3), 515-531.
Authors:  Chong, Gabriel;  Ramiah, Harikrishnan;  Yin, Jun;  Rajendran, Jagadheswaran;  Wong, Wei Ru; et al.
Favorite | TC[WOS]:16 TC[Scopus]:18  IF:1.2/1.0 | Submit date：2019/01/17
Ambient Rf Energy Harvesting  Integrated Circuit  Rectifier  Impedance Matching Network  Power Management Unit  
Design and analysis of energy recyclable bidirectional converter with digital controller for multichannel microstimulators Journal article
Lee, Paul Jung-Ho, Law, Man-Kay, Bermak, Amine. Design and analysis of energy recyclable bidirectional converter with digital controller for multichannel microstimulators[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2017, 91(3), 417-431.
Authors:  Lee, Paul Jung-Ho;  Law, Man-Kay;  Bermak, Amine
Favorite | TC[WOS]:0 TC[Scopus]:0  IF:1.2/1.0 | Submit date：2018/10/30
Electrical Stimulator  Power Supply Modulation  Energy Recycling Dc-dc Converter  
LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study Journal article
Chee Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui P. Martins. LC-VCOs using spiral inductors with single- and dual-layer patterned floating shields: a comparative study[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2017, 91(3), 497-502.
Authors:  Chee Cheow Lim;  Harikrishnan Ramiah;  Jun Yin;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:0 TC[Scopus]:1  IF:1.2/1.0 | Submit date：2018/10/30
Inductor  Patterned Floating Shield  Substrate  Cmos  Vco  
Joint-Digital-Predistortion for Wireless Transmitter's I/Q Imbalance and PA Nonlinearities Using an Asymmetrical Complexity-Reduced Volterra Series Model Journal article
Li, Y., Cheang, C.-F., Mak, P. I., Martins, R. P.. Joint-Digital-Predistortion for Wireless Transmitter's I/Q Imbalance and PA Nonlinearities Using an Asymmetrical Complexity-Reduced Volterra Series Model[J]. Springer Analog Integrated Circuits and Signal Processing, 2016, 35-47.
Authors:  Li, Y.;  Cheang, C.-F.;  Mak, P. I.;  Martins, R. P.
Favorite | TC[WOS]:5 TC[Scopus]:5  IF:1.2/1.0 | Submit date：2022/01/24
Joint-digital-predistortion  
Joint-digital-predistortion for wireless transmitter’s I/Q imbalance and PA nonlinearities using an asymmetrical complexity-reduced Volterra series model Journal article
Yue Li, Chak-Fong Cheang, Pui-In Mak, Rui P. Martins. Joint-digital-predistortion for wireless transmitter’s I/Q imbalance and PA nonlinearities using an asymmetrical complexity-reduced Volterra series model[J]. Analog Integrated Circuits and Signal Processing, 2016, 87(1), 35-47.
Authors:  Yue Li;  Chak-Fong Cheang;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:5 TC[Scopus]:5 | Submit date：2019/02/11
Computational Complexity  Digital Predistortion (Dpd)  I/q Imbalance  Power Amplifier (Pa)  Ofdm  Volterra Series  
The dispersal analysis on basis construction of digital predistortion techniques for power amplifiers Journal article
Yue L, Chak-Fong Cheang, Pui-In Mak, Rui P. Martins. The dispersal analysis on basis construction of digital predistortion techniques for power amplifiers[J]. Analog Integrated Circuits and Signal Processing, 2016, 86(1), 77-86.
Authors:  Yue L;  Chak-Fong Cheang;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:2 TC[Scopus]:3 | Submit date：2019/02/11
Basis Construction  Complexity  Digital Pre-distortion (Dpd)  Floating Point Operations (Flops)  Nonlinearity  Power Amplifier (Pa)  Volterra Series  
Systematic analysis and cancellation of kickback noise in a dynamic latched comparator Journal article
Ka-Meng Lei, Pui-In Mak, Rui P. Martins. Systematic analysis and cancellation of kickback noise in a dynamic latched comparator[J]. Analog Integrated Circuits and Signal Processing, 2013, 77(2), 277-284.
Authors:  Ka-Meng Lei;  Pui-In Mak;  Rui P. Martins
Favorite | TC[WOS]:17 TC[Scopus]:23  IF:1.2/1.0 | Submit date：2019/02/11
Analog-to-digital Converter (Adc)  Cmos  Dynamic Latched Comparator  Kickback Noise  
Excess-loop-delay compensation technique for CT Delta Sigma modulator with hybrid active-passive loop-filters Journal article
Cai, C.Y., Jiang, Y., Sin, S. W., U, S.P., Martins, R. P.. Excess-loop-delay compensation technique for CT Delta Sigma modulator with hybrid active-passive loop-filters[J]. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2013, 35-46.
Authors:  Cai, C.Y.;  Jiang, Y.;  Sin, S. W.;  U, S.P.;  Martins, R. P.
Favorite | TC[WOS]:1   IF:1.2/1.0 | Submit date：2022/01/24
Ct Delta Sigma Modulator  Hybrid Active-passive Loop-filter  Excess-loop-delay For Hybrid Active-passive Loop-filter  Excess-loop-delay Compensation Techniques For Hybrid Active-passive Loop-filter  
Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters Journal article
Chen-Yan Cai, Yang Jiang, Sai-Weng Sin, Seng-Pan U, Rui P. Martins. Excess-loop-delay compensation technique for CT ΔΣ modulator with hybrid active-passive loop-filters[J]. Analog Integrated Circuits and Signal Processing, 2013, 76(1), 35-46.
Authors:  Chen-Yan Cai;  Yang Jiang;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite | TC[WOS]:1 TC[Scopus]:1  IF:1.2/1.0 | Submit date：2019/02/11
Ct Δς Modulator  Excess-loop-delay Compensation Techniques For Hybrid Active-passive Loop-filter  Excess-loop-delay For Hybrid Active-passive Loop-filter  Hybrid Active-passive Loop-filter