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A 22.4 μw 80dB SNDR ΣΔ modulator with passive analog adder and SAR quantizer for EMG application Conference paper
Zhijie Chen, Yang Jiang, Chenyan Cai, He-Gong Wei, Sai-Weng Sin, Seng-Pan U, Zhihua Wang, Rui Paulo Martins. A 22.4 μw 80dB SNDR ΣΔ modulator with passive analog adder and SAR quantizer for EMG application[C], 2012, 257-260.
Authors:  Zhijie Chen;  Yang Jiang;  Chenyan Cai;  He-Gong Wei;  Sai-Weng Sin; et al.
Favorite | TC[WOS]:8 TC[Scopus]:10 | Submit date:2019/02/11
Σδ Modulator  Sar Quantizer  Passive Analog Adder  
Inter-Stage Gain Error self-calibration of a 31.5fJ 10b 470MS/S pipelined-SAR ADC Conference paper
Jianyu Zhong, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui P. Martins. Inter-Stage Gain Error self-calibration of a 31.5fJ 10b 470MS/S pipelined-SAR ADC[C], 2012, 153-156.
Authors:  Jianyu Zhong;  Yan Zhu;  Sai-Weng Sin;  Seng-Pan U;  Rui P. Martins
Favorite | TC[WOS]:7 TC[Scopus]:9 | Submit date:2019/02/11