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A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators Conference paper
Wong S.-S., Chio U.-F., Chan C.-H., Choi H.-L., Sin S.-W., Seng-Pan U., Martins R.P.. A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators[C], 2011, 73-76.
Authors:  Wong S.-S.;  Chio U.-F.;  Chan C.-H.;  Choi H.-L.;  Sin S.-W.; et al.
Favorite | TC[Scopus]:22 | Submit date：2019/02/11
Analog-to-digital Converter (Adc)  Asynchronous Binary-search Adc  Flash Adc  Sar Adc  
A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOS Conference paper
Chan C.-H., Zhu Y., Chio U.-F., Sin S.-W., Seng-Pan U., Martins R.P.. A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOS[C], 2011, 233-236.
Authors:  Chan C.-H.;  Zhu Y.;  Chio U.-F.;  Sin S.-W.;  Seng-Pan U.; et al.
Favorite | TC[Scopus]:72 | Submit date：2019/02/11
A 35 fJ 10b 160 MS/s pipelined-SAR ADC with decoupled flip-around MDAC and self-embedded offset cancellation Conference paper
Zhu Y., Chan C.-H., Sin S.-W., Seng-Pan U., Martins R.P., Maloberti F.. A 35 fJ 10b 160 MS/s pipelined-SAR ADC with decoupled flip-around MDAC and self-embedded offset cancellation[C], 2011, 61-64.
Authors:  Zhu Y.;  Chan C.-H.;  Sin S.-W.;  Seng-Pan U.;  Martins R.P.; et al.
Favorite | TC[WOS]:28 TC[Scopus]:20 | Submit date：2019/02/11