A 0.12-mm2 1.2-to-2.4 mW 1.3-to-2.65 GHz Fractional-N Bang-Bang Digital PLL with 8-μs Settling Time for Multi-ISM-Band ULP Radios

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	A 0.12-mm2 1.2-to-2.4 mW 1.3-to-2.65 GHz Fractional-N Bang-Bang Digital PLL with 8-μs Settling Time for Multi-ISM-Band ULP Radios
	Un, K. F.; Qi, G.; Yin, J.; Yang, S.; Yu, S.; Ieong, C. -I.; Mak, P. I.; Martins, R. P.
	2019-09-01
Source Publication	IEEE Transactions on Circuits and Systems I: Regular Papers
ISSN	1549-8328
Pages	3307-3316
Abstract	This paper describes a wideband ultra-fast-settling fractional-N bang-bang digital phase-locked loop (DPLL) for multi-ISM-band ultra-low-power (ULP) radios. We propose a mismatch-free digital-to-time-converter (DTC) gain calibration scheme to effectively shorten the calibration time, while the split coarse-fine PLL loops with different loop bandwidth accelerate the loop settling speed. The employed ring VCO (RVCO) aids to extend the frequency tuning range and generate multi-phase outputs. Prototyped in 65-nm CMOS, the DPLL consumes 1.2 to 2.4 mW over a wide frequency locking range of 68.3% (1.3 to 2.65 GHz) and occupies a die area of 0.12 mm2. The settling time measures 8 μs at an 82-MHz initial frequency error.
Keyword	digital phase-locked loop (DPLL) bang-bang digital-to-time converter (DTC) gain calibration voltage-controlled oscillator (VCO) ring VCO ultra-low-power (ULP) ultra-fast settling
Language	英語English
The Source to Article	PB_Publication
PUB ID	44527
Document Type	Journal article
Collection	University of Macau
Corresponding Author	Yin, J.
Recommended Citation GB/T 7714	Un, K. F.,Qi, G.,Yin, J.,et al. A 0.12-mm2 1.2-to-2.4 mW 1.3-to-2.65 GHz Fractional-N Bang-Bang Digital PLL with 8-μs Settling Time for Multi-ISM-Band ULP Radios[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019, 3307-3316.
APA	Un, K. F.., Qi, G.., Yin, J.., Yang, S.., Yu, S.., Ieong, C. -I.., Mak, P. I.., & Martins, R. P. (2019). A 0.12-mm2 1.2-to-2.4 mW 1.3-to-2.65 GHz Fractional-N Bang-Bang Digital PLL with 8-μs Settling Time for Multi-ISM-Band ULP Radios. IEEE Transactions on Circuits and Systems I: Regular Papers, 3307-3316.
MLA	Un, K. F.,et al."A 0.12-mm2 1.2-to-2.4 mW 1.3-to-2.65 GHz Fractional-N Bang-Bang Digital PLL with 8-μs Settling Time for Multi-ISM-Band ULP Radios".IEEE Transactions on Circuits and Systems I: Regular Papers (2019):3307-3316.

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