A 0.0071-mm² 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis

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	A 0.0071-mm² 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis
	Chen, Y.; Mak, P. I.; Yang, Z.; Boon, C.; Martins, R. P.
	2019-07-12
Source Publication	IEEE Transactions on Circuits and Systems I: Regular Papers
ISSN	1558-0806
Pages	1-14
Abstract	This paper proposes an ultra-compact 4 to 10-Gb/s 5-tap current-mode transmitter to realize the sub 1-UI fractional de-emphasis (DE) using a hybrid delay line, which is alternatively controlled by the voltage bias and clock. It exhibits the scalability between the clocked 0.5-UI and 1-UI DEs and data rate. The sub-1-UI DE provides wide tunability of the data amplitude and delay to compensate different channel losses between the 1st and 2nd Nyquist frequencies while effectively compensating the high-frequency portion of the pseudo-random binary sequence (PRBS) spectrum for data jitter improvement. Additional techniques are a two-step current-summing scheme, namely, two-step DE in the data path, and active inductors in both the data and clock paths to enhance the internal bandwidth without the need for passive inductors. In addition, we present an analytical model for predicting data-dependent jitter (DDJ) based on a generic system's step response, derive the exact closed-form DDJ expression of DE, and verify its validity by mean of circuit simulation. Prototyped in 65-nm CMOS technology, it achieves a figure-of-merit of 4.6 mW/Gb/s and an output jitter of 10.8 pspp at 10 Gb/s under a PRBS 2³¹-1 pattern. The data eyes measure 0.62-UI-horizontal and 19.5%-vertical openings after -20-dB channel loss. The die area is 0.0071 mm².
Keyword	Delays Delay lines Pulse width modulation Frequency-domain analysis Jitter Transmitters Clocks
URL	View the original
Language	英語English
The Source to Article	PB_Publication
PUB ID	48663
Document Type	Journal article
Collection	University of Macau
Corresponding Author	Chen, Y.
Recommended Citation GB/T 7714	Chen, Y.,Mak, P. I.,Yang, Z.,et al. A 0.0071-mm² 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019, 1-14.
APA	Chen, Y.., Mak, P. I.., Yang, Z.., Boon, C.., & Martins, R. P. (2019). A 0.0071-mm² 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis. IEEE Transactions on Circuits and Systems I: Regular Papers, 1-14.
MLA	Chen, Y.,et al."A 0.0071-mm² 10.8pspp-Jitter 4 to 10-Gb/s 5-Tap Current-Mode Transmitter Using a Hybrid Delay Line for Sub-1-UI Fractional De-Emphasis".IEEE Transactions on Circuits and Systems I: Regular Papers (2019):1-14.

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