| Status | 已發表Published |
| A process-and temperature-insensitive current-controlled delay generator for sampled-data systems | |
Wei, H. G. ; Chio, U.F.; Zhu, Y.; U, S.P.; Martins, R. P.
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| 2008-11-30 | |
| Source Publication | 2008 IEEE Asia Pacific Conference on Circuits and Systems
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| Abstract | This paper proposes a process- and temperatureinsensitive current-controlled delay generator which can be widely used in sampled-data systems. The delay generator provides a large tunable range by adjusting the control current and load capacitance. Full transistor-level simulations, including process corner and Monte-Carlo analysis, are presented. The delay generator is designed in 90nm CMOS technology and consumes 330 μW power from a 1.2V power supply, at a typical case of using 10μA control current and 30fF load capacitance. The process corner simulation results exhibit a typical delay of 2.09 ns with a corner variation of -7.1% / +7.6%. The 500-times process Monte-Carlo simulation obtains a mean of 2.09 ps with a standard-deviation (σ) of 28.9 ps (1.38%). |
| Keyword | Process & temperature-insensitive Delay generator Current-controlled |
| Language | 英語English |
| The Source to Article | PB_Publication |
| PUB ID | 38573 |
| Document Type | Conference paper |
| Collection | Institute of Chinese Medical Sciences |
| Recommended Citation GB/T 7714 | Wei, H. G.,Chio, U.F.,Zhu, Y.,et al. A process-and temperature-insensitive current-controlled delay generator for sampled-data systems[C], 2008. |
| APA | Wei, H. G.., Chio, U.F.., Zhu, Y.., U, S.P.., & Martins, R. P. (2008). A process-and temperature-insensitive current-controlled delay generator for sampled-data systems. 2008 IEEE Asia Pacific Conference on Circuits and Systems. |
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