20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS

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	20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS
	Jiang, J.; Lu, Y.; Ki, W.-H.; U, S.-P.; Martins, R. P.
	2017-03-01
Source Publication	Solid-State Circuits Conference (ISSCC), 2017 IEEE International
Abstract	Multicore application processors in smartphones/watches use power-saving techniques such as dynamic voltage and frequency scaling (DVFS) to extend battery cycle, and supply cores with different voltages [1]. High-efficiency fully integrated switched-capacitor (SC) power converters with no external components are promising candidates [2]. Typically, SC converters with different specifications are independently designed (Fig. 20.5.1), leading to a large area overhead, as each converter has to handle its peak output power. Recently, multi-output SC converters are reported to tackle this issue. In [3], an on-demand strategy is used to control two outputs, each with a different loading range, and the outputs are not interchangeable. In [4], the two output voltages are fixed with voltage conversion ratios (VCRs) of 2× and 3× only. In [5], the controller is integrated, but the three output voltages are still from three individual SC converters. Without reallocating the capacitors in the power stages, capacitor utilization is low, as margins have to be reserved to cater for each converter's peak output power. This paper presents a fully integrated dual-output SC converter with dynamic power-cell allocation for application processors. The power cells are shared and can be dynamically allocated according to load demands. A dual-path VCO that works independently of power-cell allocation is proposed to realize a fast and stable regulation loop. The converter can deliver a maximum current of 100mA: one output can be adjusted to deliver 100mA, while the other handles a very light load; or both outputs can be adjusted to deliver 50mA each with over 80% efficiency.
Keyword	voltage-controlled oscillators CMOS integrated circuits low-power electronics microprocessor chips multiprocessing systems power convertors switched capacitor networks
URL	View the original
Language	英語English
The Source to Article	PB_Publication
PUB ID	31708
Document Type	Conference paper
Collection	DEPARTMENT OF CHINESE LANGUAGE AND LITERATURE
Corresponding Author	Lu, Y.
Recommended Citation GB/T 7714	Jiang, J.,Lu, Y.,Ki, W.-H.,et al. 20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS[C], 2017.
APA	Jiang, J.., Lu, Y.., Ki, W.-H.., U, S.-P.., & Martins, R. P. (2017). 20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS. Solid-State Circuits Conference (ISSCC), 2017 IEEE International.

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