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A Continuous-Time VCO-assisted VCO-based ΣΔ Modulator with 76.6dB SNDR and 10MHz BW
Du, Y; He, T; Jiang, Y; Sin, S. W.; U, S.P.; Martins, R. P.
2013-05-19
Source PublicationIEEE International Symposium on Circuits and Systems (ISCAS)
Pages373-376
Publication PlaceUS
PublisherIEEE
AbstractIn this paper, a new VCO-assisted VCO-based sigma-delta (ΣΔ) modulator is proposed to improve the linearity of the VCO-based quantizer. The assistant network in the digital feedforward path reduces the input swing of the VCO-based quantizer in the main path, and then adds it together through the digital cancellation path to keep the same signal before and after quantization. Moreover, the merit of the auxiliary VCO increases the tolerance to DAC mismatches because of its intrinsic DEM function, which also simplifies the digital circuit part. A first order continuous-time (CT) ΣΔ modulator with the proposed structure is designed and simulated in a 65nm CMOS process. The performance of the modulator can reach 76.6dB/82.4dB SNDR/SNR with second order noise shaping and 84dB DR within a 10MHz bandwidth and a sampling frequency of 1.4GHz, consuming 9.4mW of power.
KeywordAnalog-to-Digital Converters ADC
URLView the original
Language英語English
The Source to ArticlePB_Publication
PUB ID10655
Document TypeConference paper
CollectionDEPARTMENT OF PUBLIC HEALTH AND MEDICINAL ADMINISTRATION
Recommended Citation
GB/T 7714
Du, Y,He, T,Jiang, Y,et al. A Continuous-Time VCO-assisted VCO-based ΣΔ Modulator with 76.6dB SNDR and 10MHz BW[C], US:IEEE, 2013, 373-376.
APA Du, Y., He, T., Jiang, Y., Sin, S. W.., U, S.P.., & Martins, R. P. (2013). A Continuous-Time VCO-assisted VCO-based ΣΔ Modulator with 76.6dB SNDR and 10MHz BW. IEEE International Symposium on Circuits and Systems (ISCAS), 373-376.
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