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A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio | |
Wei, Dong1; Wu, Tianxiang1; Ma, Shunli1; Chen, Yong2; Ren, Junyan1 | |
2021-09-13 | |
Conference Name | ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC) |
Source Publication | ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings |
Pages | 195-198 |
Conference Date | 13-22 Sept. 2021 |
Conference Place | Grenoble, France |
Country | France |
Publication Place | NEW YORK, USA |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Abstract | This paper reports a 45-GHz low-noise amplifier (LNA) covering the 22.2% -1-dB fractional bandwidth (BW). The transformer-based magnetically coupling resonators are exploited and gain response staggering techniques are applied to improve the BW efficiency and gain flatness. A three-coil transformer-based gm-boosting common-gate scheme is utilised as the input matching network in order to improve the noise results. The prototype, which was fabricated via a 65-nm CMOS process, demonstrated a maximum gain of 30.5 dB and a minimum noise figure of 4.1 dB, while the -3-dB BW was 15 GHz and the -1-dB BW was 10 GHz, meaning that the band range for IEEE 802.11aj was fully covered. The LNA consumed 63.6-mW power with a 1.2-V supply and occupied an area of 0.47 × 1.00 mm. |
Keyword | Low-noise Amplifier (Lna) Noise Figure (Nf) Cmos Transformer Gm Boosting Gain Flatness Magnetically Coupling Resonator Fractional Bandwidth (Bw) 5g New Radio Ieee 802.11aj Common Source Common Gate Noise Factor |
DOI | 10.1109/ESSCIRC53450.2021.9567743 |
URL | View the original |
Indexed By | CPCI-S |
Language | 英語English |
WOS Research Area | Engineering |
WOS Subject | Engineering, Electrical & Electronic |
WOS ID | WOS:000766309500045 |
Scopus ID | 2-s2.0-85118441776 |
Fulltext Access | |
Citation statistics | |
Document Type | Conference paper |
Collection | THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) INSTITUTE OF MICROELECTRONICS |
Affiliation | 1.State Key Laboratory of ASIC and System, Fudan University, Shanghai, China 2.State-Key Laboratory of Analog and Mixed-Signal VLSI and IME/ECE-FST, University of Macau, Macao, China |
Recommended Citation GB/T 7714 | Wei, Dong,Wu, Tianxiang,Ma, Shunli,et al. A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio[C], NEW YORK, USA:Institute of Electrical and Electronics Engineers Inc., 2021, 195-198. |
APA | Wei, Dong., Wu, Tianxiang., Ma, Shunli., Chen, Yong., & Ren, Junyan (2021). A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio. ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings, 195-198. |
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