This brief presents the design and implementation of a high-speed and high-accuracy power-switchable track-and-hold (T/H) in 90-nm CMOS that achieves a total harmonic distortion of -60 dB at 100 MS/s. With the proposed power-switching (P-S) technique, the T/H amplifier obtains not only further power optimization but also enhanced sampling speed and accuracy. The P-S technique requires no extra voltage headroom in the source-follower amplifier, thus allowing a relatively large input voltage swing of 0.8-Vpp in differential mode. A spurious-free dynamic range of 70 dB at 100 MS/s was measured with an input of 40.6 MHz and 0.8 Vpp. While driving a 2.5-pF capacitive load, the T/H consumes 2.97 mW from the 1.2-V supply. © 2006 IEEE.