Residential Collegefalse
Status已發表Published
Sine Chaotification Model for Enhancing Chaos and Its Hardware Implementation
Hua, Zhongyun1; Zhou, Binghang2; Zhou, Yicong3
2019-02
Source PublicationIEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
ISSN0278-0046
Volume66Issue:2Pages:1273-1284
Abstract

When chaotic systems are used in different practical applications, such as nonlinear control and cryptography, their complex chaos dynamics are strongly required. However, many existing chaotic systems have simple complexity, and this brings negative effects to chaos-based applications. To address this issue, this paper introduces a sine chaotification model (SCM) as a general framework to enhance the chaos complexity of existing one-dimensional (1-D) chaotic maps. The SCM uses a sine function as a nonlinear chaotification transform and applies it to the output of a 1-D chaotic map. The resulting enhanced chaotic map of the SCM has better chaos complexity and a much larger chaotic range than the seed map. Theoretical analysis verifies the efficiency of the SCM. To show the performance of the SCM, we apply SCM to three existing chaotic maps and analyze the dynamics properties of the obtained enhanced chaotic maps. Performance evaluations prove that the three enhanced chaotic maps have more complicated dynamics behaviors than their seed chaotic maps. To show the implementation simplicity of the SCM, we implement the three enhanced chaotic maps using the field-programmable gate array. To investigate the SCM in practical application, we design pseudorandom number generators using the enhanced chaotic maps.

KeywordChaotic System Chaotification Chaos-based Application Cryptography Field-programmable Gate Array (Fpga) Implementation Nonlinear Control
DOI10.1109/TIE.2018.2833049
URLView the original
Indexed BySCIE
Language英語English
WOS Research AreaAutomation & Control Systems ; Engineering ; Instruments & Instrumentation
WOS SubjectAutomation & Control Systems ; Engineering, Electrical & Electronic ; Instruments & Instrumentation
WOS IDWOS:000446340800042
PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
The Source to ArticleWOS
Scopus ID2-s2.0-85046458721
Fulltext Access
Citation statistics
Document TypeJournal article
CollectionDEPARTMENT OF COMPUTER AND INFORMATION SCIENCE
Faculty of Science and Technology
Affiliation1.School of Computer Science and Technology, Harbin Institute of Technology Shenzhen Graduate School, Shenzhen 518055, China
2.College of Electrical and Information Engineering, Hunan University, Changsha 410082, China
3.Department of Computer and Information Science, University of Macau, Macau 999078, China
Recommended Citation
GB/T 7714
Hua, Zhongyun,Zhou, Binghang,Zhou, Yicong. Sine Chaotification Model for Enhancing Chaos and Its Hardware Implementation[J]. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2019, 66(2), 1273-1284.
APA Hua, Zhongyun., Zhou, Binghang., & Zhou, Yicong (2019). Sine Chaotification Model for Enhancing Chaos and Its Hardware Implementation. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 66(2), 1273-1284.
MLA Hua, Zhongyun,et al."Sine Chaotification Model for Enhancing Chaos and Its Hardware Implementation".IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 66.2(2019):1273-1284.
Files in This Item:
There are no files associated with this item.
Related Services
Recommend this item
Bookmark
Usage statistics
Export to Endnote
Google Scholar
Similar articles in Google Scholar
[Hua, Zhongyun]'s Articles
[Zhou, Binghang]'s Articles
[Zhou, Yicong]'s Articles
Baidu academic
Similar articles in Baidu academic
[Hua, Zhongyun]'s Articles
[Zhou, Binghang]'s Articles
[Zhou, Yicong]'s Articles
Bing Scholar
Similar articles in Bing Scholar
[Hua, Zhongyun]'s Articles
[Zhou, Binghang]'s Articles
[Zhou, Yicong]'s Articles
Terms of Use
No data!
Social Bookmark/Share
All comments (0)
No comment.
 

Items in the repository are protected by copyright, with all rights reserved, unless otherwise indicated.