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Status | 已發表Published |
An Intermittent Frequency Synthesizer with Accurate Frequency Detection for Fast Duty-Cycled Receivers | |
Yin,Yadong1; El-Sankary,Kamal2; Chen,Zhizhang2; Gao,Yueming1; Vai,Mang I.3; Pun,Sio Hang3 | |
2020-02-27 | |
Source Publication | IEEE Access |
ISSN | 2169-3536 |
Volume | 8Pages:45148-45155 |
Abstract | An intermittent frequency synthesizer for fast duty-cycled receivers is presented in this paper. Different from state-of-art techniques which try to eliminate the initial phase error that degrades the intermittent frequency detection, a new frequency detector is proposed to maintain an accurate frequency detection regardless of the initial phase error. Moreover, an averaged fraction division scheme (AFDS) is integrated in the synthesizer to improve the frequency resolution. The frequency synthesizer is implemented and verified by using discrete devices and an FPGA. The measurement results show that the frequency detector provides a frequency detection accuracy of 0.88%, and the synthesizer achieves a frequency resolution of 0.625 MHz when controlled by a duty-cycled signal with a 6- \mu \text{s} period and a 2- \mu \text{s} time duration. The frequency synthesizer can perform an intermittent frequency hopping from 160MHz to 140MHz while requiring a period of 430~\mu \text{s} without disturbing the VCO's oscillation. |
Keyword | Duty Cycle Frequency Detector Frequency Synthesizer Initial Phase Error Phase-locked Loop |
DOI | 10.1109/ACCESS.2020.2976749 |
URL | View the original |
Indexed By | SCIE |
Language | 英語English |
WOS Research Area | Computer Science ; Engineering ; Telecommunications |
WOS Subject | Computer Science, Information Systems ; Engineering, Electrical & Electronic ; Telecommunications |
WOS ID | WOS:000524713900002 |
Publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC445 HOES LANE, PISCATAWAY, NJ 08855-4141 |
Scopus ID | 2-s2.0-85082036045 |
Fulltext Access | |
Citation statistics | |
Document Type | Journal article |
Collection | Faculty of Science and Technology THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
Corresponding Author | Yin,Yadong |
Affiliation | 1.School of Physics and Information Engineering, Fuzhou University, Fujian, 350000, China 2.Key Laboratory of Medical Instrumentation and Pharmaceutical Technology of Fujian Province, Fuzhou University, Fujian, 350000, China 3.Department of Electrical and Computer Engineering, Dalhousie University, Halifax, B3H 4R2, NS, Canada 4.Department of Electrical and Computer Engineering, Faculty of Science and Technology, University of Macau, 999078, Macao 5.State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, 999078, Macao |
Recommended Citation GB/T 7714 | Yin,Yadong,El-Sankary,Kamal,Chen,Zhizhang,et al. An Intermittent Frequency Synthesizer with Accurate Frequency Detection for Fast Duty-Cycled Receivers[J]. IEEE Access, 2020, 8, 45148-45155. |
APA | Yin,Yadong., El-Sankary,Kamal., Chen,Zhizhang., Gao,Yueming., Vai,Mang I.., & Pun,Sio Hang (2020). An Intermittent Frequency Synthesizer with Accurate Frequency Detection for Fast Duty-Cycled Receivers. IEEE Access, 8, 45148-45155. |
MLA | Yin,Yadong,et al."An Intermittent Frequency Synthesizer with Accurate Frequency Detection for Fast Duty-Cycled Receivers".IEEE Access 8(2020):45148-45155. |
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