A 0.6-V 100-mA fully-integrated digital low-dropout regulator (DLDO) with adaptive current step size control is presented in this paper. By dividing the main power PMOSs into ten blocks with different unit-cell sizes, the proposed DLDO can turn-on/-off small power PMOSs in light load and large ones in heavy load conditions. High regulation accuracy in a wide load range and fast transient response are hence achieved. In addition, an auxiliary power MOS block, which consists of both PMOS and NMOS transistors, is adopted to eliminate the limit cycle oscillation (LCO) in light load condition and to further accelerate the response speed. The proposed DLDO is fabricated in a 65-nm low-power CMOS technology with an active area of 0.17 mm including an on-chip output capacitor of 1nF. The measured undershoot and overshoot voltages are only 53 and 37 mV, respectively, when the load current changes between 0 and 100 mA. The quiescent current is 34.6 μA , while the maximum current efficiency is 99.96%.