| Residential College | false |
| Status | 已發表Published |
| A 10b 1.6GS/s 12.2mW 7/8-way Split Time-interleaved SAR ADC with Digital Background Mismatch Calibration | |
Guo,Mingqiang1 ; Mao,Jiaji1; Sin,Sai Weng1 ; Wei,Hegong2; Martins,R. P.1,3
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| 2019-04-01 | |
| Conference Name | 40th Annual IEEE Custom Integrated Circuits Conference, CICC 2019 |
| Source Publication | Proceedings of the Custom Integrated Circuits Conference
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| Volume | 2019-April |
| Pages | 8780222 |
| Conference Date | APR 14-17, 2019 |
| Conference Place | Austin, TX, USA |
| Country | USA |
| Publication Place | IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA |
| Publisher | IEEE |
| Abstract | This paper presents a split time-interleaved (TI) successive-approximation register (SAR) analog-to-digital converter (ADC) with digital background mismatch calibration. Benefitting from the proposed split TI topology, the mismatch calibration convergence speed is fast without any extra analog circuits. A prototype 10-b 1.6-GS/s 7/8-way split TI-SAR ADC in 28-nm CMOS achieves 54.2dB SNDR at Nyquist rate with a 2.5GHz 3-dB bandwidth, while the power consumption is 12.2mW leading to a Walden FOM of 18.2 fJ per conversion step. |
| Keyword | Sar Analog-to-digital Converter (Adc) Time-interleaved (Ti) Adc Timing-skew Calibration Split Adc Background Mismatch Calibration |
| DOI | 10.1109/CICC.2019.8780222 |
| URL | View the original |
| Indexed By | CPCI-S ; EI |
| Language | 英語English |
| WOS Research Area | Engineering |
| WOS Subject | Engineering, Electrical & Electronic |
| WOS ID | WOS:000501010700055 |
| Scopus ID | 2-s2.0-85070538243 |
| Fulltext Access | |
| Citation statistics | |
| Document Type | Conference paper |
| Collection | THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) Faculty of Science and Technology INSTITUTE OF MICROELECTRONICS DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
| Corresponding Author | Sin,Sai Weng |
| Affiliation | 1.State-Key Laboratory of Analog and Mixed Signal VLSI, University of Macau, Macao 2.University of Texas at Austin, Austin, United States 3.Instituto Superior Técnico, Universidade de Lisboa, Portugal |
| First Author Affilication | University of Macau |
| Corresponding Author Affilication | University of Macau |
| Recommended Citation GB/T 7714 | Guo,Mingqiang,Mao,Jiaji,Sin,Sai Weng,et al. A 10b 1.6GS/s 12.2mW 7/8-way Split Time-interleaved SAR ADC with Digital Background Mismatch Calibration[C], IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2019, 8780222. |
| APA | Guo,Mingqiang., Mao,Jiaji., Sin,Sai Weng., Wei,Hegong., & Martins,R. P. (2019). A 10b 1.6GS/s 12.2mW 7/8-way Split Time-interleaved SAR ADC with Digital Background Mismatch Calibration. Proceedings of the Custom Integrated Circuits Conference, 2019-April, 8780222. |
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| A_10b_1.6GS_s_12.2mW（320KB） | 会议论文 | 开放获取 | CC BY-NC-SA | View Download | ||
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