A three-level buck (TLB) converter has the characteristics of higher voltage conversion efficiency, lower inductor current ripples, output voltage ripples and voltage stresses on switches when compared with the buck converters in continuous conduction mode (CCM). With a TLB converter integrated on a chip, we cannot avoid its discontinuous conduction mode (DCM) operation due to a smaller inductance and load variation. In this paper, we'll present and discuss the analysis, design and control of a TLB converter under DCM operation, implemented in a 65nm CMOS process. Transistor level simulation results show that when the TLB converter operates at 100MHz with a 5nH on-chip inductor, a 10nF output capacitor and a 10nF flying capacitor, it can achieve an output conversion range of 0.7-1.2V from a 2.4V input supply, with a peak efficiency of 81.5%@120mW. The output load transient response is 100mV with 101ns for undershoot, and 86mV with 110ns for overshoot when IOUT=10-100mA. The maximum output voltage ripple is less than 19mV.