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A 13-bit 8-kS/s δ ∑ Readout IC Using ZCB Integrators with an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR
Li,Bing1; Na,Ji Ping2,3; Wang,Wei2,3; Liu,Jia2,3; Yang,Qian2,3; Mak,Pui In2,3
2019-04-01
Source PublicationIEEE Transactions on Very Large Scale Integration (VLSI) Systems
ISSN1063-8210
Volume27Issue:4Pages:843-853
Abstract

This paper reports on an energy-efficient \Delta -\Sigma readout IC (ROIC) with a high power-supply-rejection ratio (PSRR). The static power consumption is minimized by applying a zero-crossing-based (ZCB) circuit to implement switched-capacitor (SC) integrators, while the resistive sensor is embedded inside the circuit to reuse the bias current. Oversampling \Delta -\Sigma modulation also directly provides the digitized output, avoiding the need for a power-hungry instrumentation amplifier while preserving the linear settling behavior of the ZCB SC integrators. A dual-path bridge measurement AIDS in upholding PSRR of ROIC against bridge imbalance. Prototyped in 0.18-\mu \text{m} CMOS, the dual-path ROIC for the bridge measurement shows a nonlinearity of <400 ppm and an rms-noise-equivalent resolution of 13 bits at a conversion rate of 8 kS/s, corresponding to a figure of merit of 1.05-pJ/conversion step. The achieved noise-frequency-independent PSRR is 65 dB, and the supply and temperature sensitivities are 0.23%/V and 55 ppm/°C, respectively.

KeywordCmos Figure Of Merit (Fom) Oversampling Δ-ς Modulation Power-supply Rejection Ratio (Psrr) Readout Ic (roIc) Resistive Sensor Wheatstone Bridge Zero-crossing-based (Zcb) Integrator
DOI10.1109/TVLSI.2019.2895361
URLView the original
Indexed BySCIE
Language英語English
WOS Research AreaComputer Science ; Engineering
WOS SubjectComputer Science, Hardware & Architecture ; Engineering, Electrical & Electronic
WOS IDWOS:000462444000010
Scopus ID2-s2.0-85063535455
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Citation statistics
Document TypeJournal article
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Faculty of Science and Technology
THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU)
INSTITUTE OF MICROELECTRONICS
Corresponding AuthorLi,Bing; Mak,Pui In
Affiliation1.College of Electronic Science and Technology,Shenzhen University,Shenzhen,China
2.State Key Laboratory of Analog and Mixed-Signal VLSI,University of Macau,Macao,Macao
3.Department of Electrical and Computer Engineering,Faculty of Science and Technology,University of Macau,Macao,Macao
Corresponding Author AffilicationUniversity of Macau;  Faculty of Science and Technology
Recommended Citation
GB/T 7714
Li,Bing,Na,Ji Ping,Wang,Wei,et al. A 13-bit 8-kS/s δ ∑ Readout IC Using ZCB Integrators with an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, 27(4), 843-853.
APA Li,Bing., Na,Ji Ping., Wang,Wei., Liu,Jia., Yang,Qian., & Mak,Pui In (2019). A 13-bit 8-kS/s δ ∑ Readout IC Using ZCB Integrators with an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27(4), 843-853.
MLA Li,Bing,et al."A 13-bit 8-kS/s δ ∑ Readout IC Using ZCB Integrators with an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR".IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27.4(2019):843-853.
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