Residential College | false |
Status | 已發表Published |
A Digital SC Converter with High Efficiency and Low Voltage Ripple | |
Jiang, Junmin; Ki, Wing-Hung; Lu, Yan; IEEE | |
2018 | |
Conference Name | 2018 23RD ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) |
Pages | 289-290 |
Conference Date | JAN 22-25, 2018 |
Conference Place | Jeju, SOUTH KOREA |
Publication Place | 345 E 47TH ST, NEW YORK, NY 10017 USA |
Publisher | IEEE |
Abstract | A switched-capacitor DC-DC converter with a low output voltage ripple and high efficiency is presented in this summary. To achieve a wide input and output voltage range, a 3-clock-phase operation is proposed to achieve 6 voltage conversion ratios (VCRs) with only two discrete flying capacitors. A digital ripple reduction scheme is utilized to achieve up to four times reduction in output voltage ripple. The digital design also improves the design flexibility. The converter can deliver a 250mW maximum power to a wide output range of 0.5 V to 3 V with an input range of 1.6 V to 3.3 V, and achieves a peak efficiency of 91%. |
DOI | 10.1109/ASPDAC.2018.8297324 |
URL | View the original |
Language | 英語English |
WOS Research Area | Computer Science ; Engineering |
WOS Subject | Computer Science, Hardware & Architecture ; Engineering, Electrical & Electronic |
WOS ID | WOS:000426987100051 |
The Source to Article | WOS |
Scopus ID | 2-s2.0-85045326648 |
Fulltext Access | |
Citation statistics | |
Document Type | Conference paper |
Collection | University of Macau |
Recommended Citation GB/T 7714 | Jiang, Junmin,Ki, Wing-Hung,Lu, Yan,et al. A Digital SC Converter with High Efficiency and Low Voltage Ripple[C], 345 E 47TH ST, NEW YORK, NY 10017 USA:IEEE, 2018, 289-290. |
APA | Jiang, Junmin., Ki, Wing-Hung., Lu, Yan., & IEEE (2018). A Digital SC Converter with High Efficiency and Low Voltage Ripple. , 289-290. |
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