Although a compact holes-transport-layer (HTL) film has always been deemed mandatory for perovskite solar cells (PSCs), the impact their compactness on the device performance has rarely been studied in detail. In this work, based on a device structure of FTO/CIGS/perovskite/PCBM/ZrAcac/Ag, that effect was systematically investigated with respect to device performance along with photo-physics characterization tools. Depending on spin-coating speed, the grain size and coverage ratio of those CIGS films on FTO substrates can be tuned, and this can result in different hole transfer efficiencies at the anode interface. At a speed of 4000 r.p.m., the band level offset between the perovskite and CIGS modified FTO was reduced to a minimum of 0.02 eV, leading to the best device performance, with conversion efficiency of 15.16% and open-circuit voltage of 1.04 V, along with the suppression of hysteresis. We believe that the balance of grain size and coverage ratio of CIGS interlayers can be tuned to an optimal point in the competition between carrier transport and recombination at the interface based on the proposed mechanism. This paper definitely deepens our understanding of the hole transfer mechanism at the interface of PSC devices, and facilitates future design of high-performance devices.