This paper presents SIMULINK(R) modeling of the non-idealities of a bandpass sigma-delta modulator which are appropriate for behavioral simulation. Such non-idealities include clock random jitter, periodic timing-skew, op-amp non-idealities parameters (DC gain. slew-rate, gain-bandwidth, saturation voltage, capacitor mismatch aid noise), and also the complete modulator noise analysis. Such modeling will be based on a real design example of a 4(th)-order switched-capacitor (SC) bandpass sigma-delta modulator with double sampling. Following the top-down design manner, the behavioral simulation targets the necessary design specifications for various building blocks.