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A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM | |
Tongquan Jiang1; Jun Yin1; Pui-In Mak1; Rui P. Martins1 | |
2019-02-01 | |
Source Publication | IEEE Transactions on Circuits and Systems II: Express Briefs |
ISSN | 1549-7747 |
Volume | 66Issue:2Pages:157-161 |
Abstract | An ultra-low-voltage 8-phase bootstrap (BT) ring-voltage-controlled oscillator (RVCO) exhibiting an improved figure of merit up to 165.2 dBc/Hz is reported. Unlike the existing RVCOs that use single-ended BT inverters with conventional clocks, our RVCO benefits from the inherent non-overlapping clocks of pseudo-differential BT inverters to reduce the charge loss due to asynchronous charge-pump operation, and the phase sensitivity to the transistor noise. They together result in higher oscillation frequency and output swing, while lowering the phase noise. Fabricated in 65-nm CMOS, the BT RVCO measures a phase noise of -93.7 to -92.6 dBc/Hz at a 1-MHz offset from 0.4 to 1.6 GHz, while dissipating 47.4 to μm at 0.5 V. |
Keyword | Bootstrap (Bt) Low Voltage Non-overlapping Clock Phase Noise Ring Voltage-controlled Oscillator (Rvco) |
DOI | 10.1109/TCSII.2018.2842185 |
URL | View the original |
Indexed By | SCIE |
Language | 英語English |
WOS Research Area | Engineering |
WOS Subject | Engineering, Electrical & Electronic |
WOS ID | WOS:000458017900001 |
Scopus ID | 2-s2.0-85047819293 |
Fulltext Access | |
Citation statistics | |
Document Type | Journal article |
Collection | DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING Faculty of Science and Technology THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU) INSTITUTE OF MICROELECTRONICS |
Corresponding Author | Jun Yin |
Affiliation | 1.Universidade de Macau 2.Instituto Superior Técnico |
First Author Affilication | University of Macau |
Corresponding Author Affilication | University of Macau |
Recommended Citation GB/T 7714 | Tongquan Jiang,Jun Yin,Pui-In Mak,et al. A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, 66(2), 157-161. |
APA | Tongquan Jiang., Jun Yin., Pui-In Mak., & Rui P. Martins (2019). A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM. IEEE Transactions on Circuits and Systems II: Express Briefs, 66(2), 157-161. |
MLA | Tongquan Jiang,et al."A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM".IEEE Transactions on Circuits and Systems II: Express Briefs 66.2(2019):157-161. |
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