Residential College | false |
Status | 已發表Published |
Digital 2-/3-Phase Switched-Capacitor Converter with Ripple Reduction and Efficiency Improvement | |
Jiang J.1; Ki W.-H.1; Lu Y.2 | |
2017-07-01 | |
Source Publication | IEEE Journal of Solid-State Circuits |
ISSN | 00189200 |
Volume | 52Issue:7Pages:1836-1848 |
Abstract | This paper presents a digitally controlled 2-/3-phase 6-ratio switched-capacitor (SC) dc-dc converter with low output voltage ripple and high efficiency. To achieve wide input and output voltage ranges, six voltage conversion ratios are generated with only two discrete flying capacitors by using both 2- A nd 3-phase operations. An adaptive ripple reduction scheme is proposed to achieve up to four times reduction in the output voltage ripple. The complexity of controller design is reduced by using digital synthesis, and the technique is scalable with process. Fast loop response is achieved by using synchronized hysteretic control. The SC converter was fabricated in a 0.13-μm CMOS process. It can deliver a maximum power of 250 mW to an output of 0.5-3 V with a wide input voltage range of 1.6-3.3 V. Compared to an SC converter with only 2-phase operation, the maximum efficiency improvement is 20%. The converter achieves a peak efficiency of 91%. |
Keyword | 2-/3-phase 3-phase Adaptive Ripple Reduction Dc-dc Converter Digitally Controlled Efficiency Improvements Sc Converter Switched-capacitor (Sc) Voltage Conversion Ratio Voltage Regulator |
DOI | 10.1109/JSSC.2017.2679065 |
URL | View the original |
Indexed By | SCIE |
Language | 英語English |
WOS Research Area | Engineering |
WOS Subject | Engineering, Electrical & Electronic |
WOS ID | WOS:000404301300011 |
Scopus ID | 2-s2.0-85017161745 |
Fulltext Access | |
Citation statistics | |
Document Type | Journal article |
Collection | INSTITUTE OF MICROELECTRONICS |
Corresponding Author | Jiang J.; Ki W.-H.; Lu Y. |
Affiliation | 1.Hong Kong University of Science and Technology 2.Universidade de Macau |
Corresponding Author Affilication | University of Macau |
Recommended Citation GB/T 7714 | Jiang J.,Ki W.-H.,Lu Y.. Digital 2-/3-Phase Switched-Capacitor Converter with Ripple Reduction and Efficiency Improvement[J]. IEEE Journal of Solid-State Circuits, 2017, 52(7), 1836-1848. |
APA | Jiang J.., Ki W.-H.., & Lu Y. (2017). Digital 2-/3-Phase Switched-Capacitor Converter with Ripple Reduction and Efficiency Improvement. IEEE Journal of Solid-State Circuits, 52(7), 1836-1848. |
MLA | Jiang J.,et al."Digital 2-/3-Phase Switched-Capacitor Converter with Ripple Reduction and Efficiency Improvement".IEEE Journal of Solid-State Circuits 52.7(2017):1836-1848. |
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