Residential College | false |
Status | 已發表Published |
A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer | |
Yuefeng Cao; Minglei Zhang; Yan Zhu; R. P. Martins; Chi-Hang Chan | |
2024-02 | |
Conference Name | 2024 IEEE International Solid-State Circuits Conference (ISSCC) |
Conference Date | 2024-02-18-22 |
Conference Place | San Francisco, CA, USA |
Document Type | Conference paper |
Collection | INSTITUTE OF MICROELECTRONICS |
Corresponding Author | Chi-Hang Chan |
Recommended Citation GB/T 7714 | Yuefeng Cao,Minglei Zhang,Yan Zhu,et al. A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer[C], 2024. |
APA | Yuefeng Cao., Minglei Zhang., Yan Zhu., R. P. Martins., & Chi-Hang Chan (2024). A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer. . |
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