This work presents a fully integrated switched-capacitor (SC) floating-domain gate driver with enhanced driving capability and reduced charge-sharing loss. The proposed driver employs a reconfigurable SC bank (RSCB) to achieve multistep gate driving and minimized bootstrapping capacitance (CBST) area cost. An autonomous switching control determines the reconfiguration of the proposed RSCB by comparing the sensed gate-to-source transient voltage with a triggering level. Fabricated using a 180-nm SOI BCD process, the prototype supports a switching frequency of up to 6MHz and a 48V input for a half-bridge GaN testbench, occupying only 0.048mm 2 of on-chip bootstrap capacitance. The measured delivered gate charge over the C BST area reaches up to 7.7nC/mm 2 , making a 38-fold improvement over conventional techniques, also achieving a 16.2 times reduction in the required C BST area compared to prior designs when driving the same power devices.