| Residential College | false |
| Status | 已發表Published |
| A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM | |
TAN FEI ; YU WEI HAN ; LIN JINHAI; UN KA FAI ; RUI P. MARTINS; MAK PUI IN
| |
| 2024-07 | |
| Source Publication | IEEE Journal of Solid State Circuits
 |
| Indexed By | SCIE |
| Language | 英語English |
| Document Type | Journal article |
| Collection | INSTITUTE OF MICROELECTRONICS |
| Corresponding Author | YU WEI HAN |
| Affiliation | University of Macau |
| First Author Affilication | University of Macau |
| Corresponding Author Affilication | University of Macau |
| Recommended Citation GB/T 7714 | TAN FEI,YU WEI HAN,LIN JINHAI,et al. A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM[J]. IEEE Journal of Solid State Circuits, 2024. |
| APA | TAN FEI., YU WEI HAN., LIN JINHAI., UN KA FAI., RUI P. MARTINS., & MAK PUI IN (2024). A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM. IEEE Journal of Solid State Circuits. |
| MLA | TAN FEI,et al."A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM".IEEE Journal of Solid State Circuits (2024). |
| Files in This Item: | There are no files associated with this item. | |||||
Items in the repository are protected by copyright, with all rights reserved, unless otherwise indicated.
Edit Comment