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A Fully Synthesizable All-Digital Dual-Loop Distributed Low-Dropout Regulator
Mao, Xiangyu1; Lu, Yan1; Martins, Rui P.1,2
2024-06-01
Source PublicationIEEE Journal of Solid-State Circuits
ISSN0018-9200
Volume59Issue:6Pages:1871-1882
Abstract

Distributed low-dropout voltage regulators (LDOs) can mitigate the global IR drop and improve the local transient performances for a high-current large-area power delivery network. However, they also face integration and current-sharing challenges. To tackle these challenges, this article presents an all-digital dual-loop distributed LDO with one global controller (GC) and multiple scalable local voltage regulators (LVRs). For fully synthesizable and easy integration, all the control circuits are implemented using standard digital cells. In each LVR, we use a 5-bit time-to-digital converter (TDC) for fast local voltage sensing. The global integral loop provides the dynamic reference bits for all the LVRs, compensating the TDC PVT variations in the LVRs. This all-digital comparator-TDC quantizer, combined with coarse-fine tuning and asynchronous window control, enables the proposed LDO architecture to obtain high output accuracy and one-cycle transient response. For current balancing in distributed scenarios, we introduce a digital primary-secondary one-time calibration scheme to tackle the mismatches among the local TDCs. A distributed LDO prototype with one GC and nine LVRs is implemented in a 28-nm bulk CMOS process. Measurements with one LVR and multiple LVRs demonstrate the stability and scalability of the proposed architecture. With nine LVRs, the measured droop is 54 mV under a 1.35-A/10-ns sharp load step. We also obtain a good load regulation of 3 mV/A, a peak current efficiency of 99.67%, and a current density of 16.7 A/mm2.

KeywordAsynchronous Window Control Distributed Ldo Dual Loop Fully Synthesizable Low-dropout Regulator Primary-secondary Calibration
DOI10.1109/JSSC.2023.3340008
URLView the original
Indexed BySCIE
Language英語English
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:001134397800001
PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141
Scopus ID2-s2.0-85181827765
Fulltext Access
Citation statistics
Document TypeJournal article
CollectionINSTITUTE OF MICROELECTRONICS
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Corresponding AuthorLu, Yan
Affiliation1.Institute of Microelectronics, FST-DECE, University of Macau, State Key Laboratory of Analog and Mixed-Signal VLSI, Macao
2.Instituto Superior Técnico, Universidade de Lisboa, Lisbon, 1049-001, Portugal
First Author AffilicationFaculty of Science and Technology
Corresponding Author AffilicationFaculty of Science and Technology
Recommended Citation
GB/T 7714
Mao, Xiangyu,Lu, Yan,Martins, Rui P.. A Fully Synthesizable All-Digital Dual-Loop Distributed Low-Dropout Regulator[J]. IEEE Journal of Solid-State Circuits, 2024, 59(6), 1871-1882.
APA Mao, Xiangyu., Lu, Yan., & Martins, Rui P. (2024). A Fully Synthesizable All-Digital Dual-Loop Distributed Low-Dropout Regulator. IEEE Journal of Solid-State Circuits, 59(6), 1871-1882.
MLA Mao, Xiangyu,et al."A Fully Synthesizable All-Digital Dual-Loop Distributed Low-Dropout Regulator".IEEE Journal of Solid-State Circuits 59.6(2024):1871-1882.
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