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A fifth-order 20-MHz transistorized-LC-ladder LPF with 58.2-dB SFDR, 68-μW/Pole/MHz efficiency, and 0.13-mm2 die size in 90-nm CMOS
Yong Chen2; Pui-In Mak1; Li Zhang2; He Qian2; Yan Wang2
2013-01-15
Source PublicationIEEE Transactions on Circuits and Systems II: Express Briefs
ISSN1549-7747
Volume60Issue:1Pages:11-15
Abstract

A novel transistorized-LC-ladder low-pass filter (LPF) is realized by combining source followers with Q-enhanced floating differential active inductors. It features a small number of active devices to minimize the sources of nonlinearity and noise and a robust frequency response against process variations and device mismatches. A fifth-order 20-MHz LPF prototype is fabricated in 90-nm CMOS. It measures a 58.2-dB spurious-free dynamic range with 6.8 mW of power, which corresponds to a selectivity efficiency of 68-μ W pole MHz favorably comparable with the state of the art. The die size is merely 0.13 mm. 

KeywordActive Inductor Cmos Continuous Time Floating Differential Active Inductor (Fdai) Low-pass Filter (Lpf) Source Follower (Sf)
DOI10.1109/TCSII.2012.2234894
URLView the original
Indexed BySCIE
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000316262000003
PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC445 HOES LANE, PISCATAWAY, NJ 08855-4141
Scopus ID2-s2.0-84874946091
Fulltext Access
Citation statistics
Document TypeJournal article
CollectionDEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Faculty of Science and Technology
THE STATE KEY LABORATORY OF ANALOG AND MIXED-SIGNAL VLSI (UNIVERSITY OF MACAU)
INSTITUTE OF MICROELECTRONICS
Corresponding AuthorYong Chen
Affiliation1.Universidade de Macau
2.Tsinghua University
Recommended Citation
GB/T 7714
Yong Chen,Pui-In Mak,Li Zhang,et al. A fifth-order 20-MHz transistorized-LC-ladder LPF with 58.2-dB SFDR, 68-μW/Pole/MHz efficiency, and 0.13-mm2 die size in 90-nm CMOS[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2013, 60(1), 11-15.
APA Yong Chen., Pui-In Mak., Li Zhang., He Qian., & Yan Wang (2013). A fifth-order 20-MHz transistorized-LC-ladder LPF with 58.2-dB SFDR, 68-μW/Pole/MHz efficiency, and 0.13-mm2 die size in 90-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs, 60(1), 11-15.
MLA Yong Chen,et al."A fifth-order 20-MHz transistorized-LC-ladder LPF with 58.2-dB SFDR, 68-μW/Pole/MHz efficiency, and 0.13-mm2 die size in 90-nm CMOS".IEEE Transactions on Circuits and Systems II: Express Briefs 60.1(2013):11-15.
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