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Status | 已發表Published |
17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM | |
Tan, Fei1; Yu, Wei Han1; Lin, Jinhai1; Un, Ka Fai1; Martins, Rui P.1,2; Mak, Pui In1 | |
2024 | |
Conference Name | 2024 IEEE International Solid-State Circuits Conference, ISSCC 2024 |
Source Publication | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
Pages | 330-332 |
Conference Date | 18 February 2024through 22 February 2024 |
Conference Place | San Francisco |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Abstract | Ultra-low-power keyword-spotting (KWS) chips are pivotal for edge devices to provide speech-triggering interaction. Recent KWS chips [1]-[4] succeed in improving the system accuracy and power efficiency via co-optimization between the algorithm and hardware. Yet, their false alarm rate (FAR) is still high, between 7.2% to 13% [1]-[4], leading to an unsatisfied user experience (Fig. 17.9.1, left). Aiding the KWS with speaker verification (SV) can substantially improve the FAR since most KWS interaction comes from the target users enrolled in the device [5]. Still, joint computation of KWS + SV can drastically enlarge the model parameters and power budget [2], while prolonging the decision latency. This paper reports a KWS chip achieving a 12-Class accuracy of 91.8% and a 1.8% FAR within a 2ms decision latency. As shown in Fig. 17.9.1 (right), the key techniques are: 1) transfer-computing SV-assisted KWS that compresses the required parameters and enhances the KWS+SV computation efficiency; 2) hybrid-domain computing that handles both the analog and digital input features (IFs), alleviating the tradeoff between the computation power and system accuracy of the first layer; 3) scalable 5T-SRAM array that favors upscaling of itself with reduced leakage power and read power. |
DOI | 10.1109/ISSCC49657.2024.10454548 |
URL | View the original |
Language | 英語English |
Scopus ID | 2-s2.0-85188060252 |
Fulltext Access | |
Citation statistics | |
Document Type | Conference paper |
Collection | DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING INSTITUTE OF MICROELECTRONICS |
Affiliation | 1.University of Macau, Macao 2.University of Lisboa, Lisboa, Portugal |
First Author Affilication | University of Macau |
Recommended Citation GB/T 7714 | Tan, Fei,Yu, Wei Han,Lin, Jinhai,et al. 17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM[C]:Institute of Electrical and Electronics Engineers Inc., 2024, 330-332. |
APA | Tan, Fei., Yu, Wei Han., Lin, Jinhai., Un, Ka Fai., Martins, Rui P.., & Mak, Pui In (2024). 17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 330-332. |
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