Shaping the interstage gain error in two-step oversampling ADCs has demonstrated a decent error suppression with a variety of mechanisms. The interstage gain error shaping (GES) technique in [1-2] reduces the quantization noise from the 1 st stage (Q1) before amplification by subtracting the predicted Q1 based on the 2 textnd -stage output. Equivalently, the gain error (Delta) undergoes a high-pass filtering (1-HGES) and thereby shapes to high frequencies. Nevertheless, such a solution induces truncation error (Qtr) which needs to be suppressed by the cascaded digital error feedback (DEF) at the 2 textnd -stage output [2]. It also introduces an additional pole (1-Delta HGES) in the overall ADC in/out transfer function. The former issue complicates the design with multi-bit loop operation and confines the speed, while the latter leads to positive feedback with +Delta and thereby significantly enlarges the swing of the 1 st stage residue voltage (Vres1). The MASH N-0 structure in [3] deduces the gain error through the dedicated noise transfer function (NTF) from the 1 textst stage. However, it gives rise to the potential noise leakage issue, which in turn limits the gain-error shaping ability with a passive-only integrator in the 1 st stage. Such an integrator also imposes an additional large capacitor and long integration time in the critical signal path. Moreover, it necessitates a multiple-pair amplifier that undesirably calls for high gain and additional noise sources.