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“An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition,” 2022 International Symposium on Integrated Circuits and Systems (ISICAS), Bordeaux, F
Lei Xuan; Ka-Fai Un; Chi-Seng Lam; Rui P. Martins
2022-10
Size of Audience30
Type of SpeakerPaper Presentation
Document TypePresentation
CollectionINSTITUTE OF MICROELECTRONICS
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Corresponding AuthorKa-Fai Un; Chi-Seng Lam
AffiliationUniversity of Macau
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Lei Xuan,Ka-Fai Un,Chi-Seng Lam,et al. “An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition,” 2022 International Symposium on Integrated Circuits and Systems (ISICAS), Bordeaux, F
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