In this paper, a novel analytical linearization method for CMOS MMIC power amplifier based on parallel connection of transistors (also named Multiple Gated Transistors) is proposed. By this method, the power amplifier's IMD can be eliminated analytically by operating these transistors within the determined g linearized range. In order to demonstrate the proposed method usefulness, a 900 MHz Class AB power amplifier using 4 NMOS transistors with maximum aspect ratio (Q/L)=1300/0.5 is designed based on 0.35 μm CMOS process. The simulated results demonstrate that -76dB IMD can be obtained with 13dB as power gain.