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An efficient DAC and interstage gain error calibration technique for multi-bit pipelined ADCs
Li D.2; Sin S.-W.2; Seng-Pan U.2; Martins R.P.1,2
2010-12-01
Conference NameIEEE Asia Pacific Conference on Circuit and System (APCCAS)
Source PublicationIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
Pages208-211
Conference DateDEC 06-09, 2010
Conference PlaceKuala Lumpur, MALAYSIA
Abstract

This paper presents a novel digital calibration technique for pipelined ADCs, which compensates both sub-DAC and interstage gain error. The proposed calibration technique is very efficient comparing to other existing calibration techniques, in which only additions and subtractions are employed in this algorithm, no multiplication and division is included. The simplicity of the calibration makes it very easy to be embedded in the mixed signal system design. The power and area overheads due to the calibration circuit are minimized. An example pipelined ADC is designed to demonstrate this calibration technique. Simulation results show that significant improvements can be achieved with the proposed calibration technique. © 2010 IEEE.

KeywordCapacitor Mismatch Digital Calibration Interstage Gain Error Pipelined Adcs
DOI10.1109/APCCAS.2010.5774899
URLView the original
Indexed ByCPCI-S
Language英語English
WOS Research AreaEngineering
WOS SubjectEngineering, Electrical & Electronic
WOS IDWOS:000296009300053
Scopus ID2-s2.0-79959246844
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Citation statistics
Document TypeConference paper
CollectionINSTITUTE OF MICROELECTRONICS
Faculty of Science and Technology
DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING
Affiliation1.Instituto Superior Técnico
2.Universidade de Macau
First Author AffilicationUniversity of Macau
Recommended Citation
GB/T 7714
Li D.,Sin S.-W.,Seng-Pan U.,et al. An efficient DAC and interstage gain error calibration technique for multi-bit pipelined ADCs[C], 2010, 208-211.
APA Li D.., Sin S.-W.., Seng-Pan U.., & Martins R.P. (2010). An efficient DAC and interstage gain error calibration technique for multi-bit pipelined ADCs. IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, 208-211.
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