Residential College | false |
Status | 已發表Published |
A digital background nonlinearity calibration algorithm for pipelined ADCs | |
Fei Y.; Sin S.-W.; U S.-P.; Martins R.P. | |
2010-12-20 | |
Conference Name | 2010 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia) |
Source Publication | PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics |
Pages | 115-118 |
Conference Date | 22-24 Sept. 2010 |
Conference Place | Shanghai, China |
Abstract | This paper presents a new digital background calibration algorithm for pipelined analog-to-digital converters (ADCs). Background calibration can extract calibration data without interrupting ADCs normal conversion operation. Digital calibration can relax the design difficulty of analog circuits of ADCs, and gains the improvement of technology scaled down. This algorithm provides a method to effectively estimate the nonlinearity of opamp, and calibrates it in digital domain without any additional analog circuit. Simulation results show that the ENOB can be improved from 6.3b to 10.67b by the proposed algorithm. |
DOI | 10.1109/PRIMEASIA.2010.5604949 |
URL | View the original |
Language | 英語English |
Scopus ID | 2-s2.0-78650136962 |
Fulltext Access | |
Citation statistics | |
Document Type | Conference paper |
Collection | INSTITUTE OF MICROELECTRONICS Faculty of Science and Technology DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING |
Affiliation | Universidade de Macau |
First Author Affilication | University of Macau |
Recommended Citation GB/T 7714 | Fei Y.,Sin S.-W.,U S.-P.,et al. A digital background nonlinearity calibration algorithm for pipelined ADCs[C], 2010, 115-118. |
APA | Fei Y.., Sin S.-W.., U S.-P.., & Martins R.P. (2010). A digital background nonlinearity calibration algorithm for pipelined ADCs. PrimeAsia 2010 - 2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, 115-118. |
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