This paper analyzes the thermal and reference noises of two types of successive-approximation-register (SAR) analog-to-digital converters (ADCs): the time-interleaving (TI) and the partial-interleaving (PI) Pipelined. The thermal noise is investigated with accurate estimation by deriving closed-form expressions according to the noise equivalent models on different phases. Additionally, the design trade-off between power and noise for two ADC architectures is discussed in detail. On the other hand, the reference noise due to the large switching transient, which significantly degrades the conversion accuracy, is analyzed and verified through behavioral and circuit level simulations of two ADC architectures operating at 500 MS/s for 10-bit resolution. The simulated results show the supremacy of the PI Pipelined-SAR (PS) architecture over the TI-SAR because it exhibits less reference noise sensitivity.