This paper presents an energy-efficient ultra-low power incremental analog-to-digital converter (I-ADC) for wearable sensing systems. In order to improve the energy efficiency without sacrificing the conversion resolution and linearity, limited by the use of Nyquist quantizers as in traditional two-step I-ADCs, we propose an iterative I-ADC (II-ADC) that breaks this performance tradeoff by taking advantage of the two-step topology while iteratively reusing the same hardware for both the coarse/fine conversions. As a result, higher SQNR can be accomplished with the same number of conversion cycles, leading to improved energy efficiency. Chopping and dynamic element matching are utilized for low offset and high linearity. Fabricated in 0.18-μm standard CMOS, the proposed II-ADC occupies an active area of only 0.08 mm2. The chip prototype operating at 4 kHz achieves a SNDR of 87.2 dB over a 25 Hz bandwidth while consuming only 310 nW from a 1-V supply, corresponding to a Shreier and Walden Figure-of-Merit (FoM) of 330 fJ/conv.-step and 166.3 dB, respectively.